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MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS GENERAL DESCRIPTION The M62398P,FP is a 12V type CMOS 12-channel D-A converters with output buffer amplifiers. It can communicate with a microcontroller via few wiring thanks to the adoption of the two-line I2C BUS. The output buffer amplifier employs AB class output with sinking and sourcing capability of more than 2.5mA ,and an output voltage range is nearly between ground and VrefU. Maximum 8 ICs can be connected to a bus by using three chip-set pins , so that it is possible to handle up to 96 channels. FEATURES * I2C BUS serial data method * Wide output range Nearly between ground and VrefU(0~12V). * High output current drive capability Over 2.5mA * 2 setting voltage ranges by dual input pins for upper voltage references (VrefU1,U2) APPLICATION Conversion from digital control data to analog control data for both consumer and industrial equipment. Gain control and automatic adjustment of DISPLAY-MONITOR or CTV.
PIN CONFIGURATION (TOP VIEW)
R1 SCL 2 SDA 3 Ao7 4 Ao8 5 Ao9 6 Ao10 7 Ao11 8 Ao12 9 VrefL 10 VrefU1 11 GND 12 Outline
24 CS0 23 CS1 22 CS2 21 VDD 20 VCC 19 Ao6 18 Ao5 17 Ao4 16 Ao3 15 Ao2 14 Ao1 13 VrefU2 24P4D (P) 24P2N-B (FP)
M62398P,FP
BLOCK DIAGRAM
CS0 CS1 CS2
24 23 22
VDD Vcc Ao6
21 20 19
Ao5
18
Ao4
17
Ao3
16
Ao2
15
Ao1
14
VrefU2 GND
13 12
R2
CHIP SELECT
R2 R1
8bit upper segment R-2R 8bit Latch
R2 R1
8bit upper segment R-2R 8bit Latch
R2 R1
8bit upper segment R-2R 8bit Latch
R2 R1
8bit upper segment R-2R 8bit Latch
R2 R1
R1
I2C BUS TRANSCEIVER
ADDRESS DECODER
8bit upper segment R-2R 8bit Latch
8bit upper segment R-2R 8bit Latch
8
R2 =2.4 R1
8bit Latch 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R 8bit Latch 8bit upper segment R-2R
8bit upper segment R-2R
R1 R2
1 2 3 4 5
R1 R2
6
R1 R2
7
R1 R2
8
R1 R2
9
R1 R2
10 11
R
SCL SDA
Ao7
Ao8
Ao9
Ao10
Ao11
Ao12
VrefL VrefU1
MITSUBISHI ELECTRIC
1997-5-28D.rev
(1 / 7)
MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
EXPLANATION OF TERMINALS
PIN No. Symbol 3 1 2 14 15 16 17 18 19 4 5 6 7 8 9 20 21 12 10 11 13 22 23 24 SDA R SCL Ao1 Ao2 Ao3 Ao4 Ao5 Ao6 8bit D-A converter output terminal Ao7 Ao8 Ao9 Ao10 Ao11 Ao12 VCC VDD GND VrefL VrefU1 VrefU2 CS2 CS1 CS0 Analog power supply terminal Digital power supply terminal Analog and digital common GND D-A converter low level reference voltage input terminal D-A converter high level reference voltage input terminal 1 D-A converter high level reference voltage input terminal 2 Chip select data input terminal 2 Chip select data input terminal 1 Chip select data input terminal 0 Function Serial data input terminal Reset signal input terminal Serial clock input terminal
MITSUBISHI ELECTRIC
1997-5-28D.rev
(2 / 7)
MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VDD VrefU1,2 VinD Pd Topr Tstg Parameter Supply voltage Supply voltage D-A converter upper reference voltage Digital input voltage Power dissipation Operating temperature Storage temperature Conditions Ratings -0.3~13.5 -0.3~7.0 VDD -0.3~VDD+0.3 465(DIP) /421(FP) -20~85 -40~125 Unit V V V V mW C C
ELECTRIC CHARACTERISTICS
< Digital part > (VCC=13V,VDD=Vref U1,2=+5V10%,GND=VrefL=0V,Ta=-20~85C,unless otherwise noted) Symbol VDD IDD IILK VIL VIH Parameter Supply voltage Supply current Input leak current Input low voltage Input high voltage 0.8VDD CLK=1MHz operation IAO=0A VIN=0~VDD -10 Test conditions MIN 4.5 Ratings TYP 5.0 MAX 5.5 1 10 0.2VDD Unit V mA A V V
< Analog part >(VCC=13V,VDD=VrefU1,2=+5V10%,GND=VrefL=0V,Ta=-20~85C,unless otherwise noted) Symbol VCC ICC IrefU VrefU VrefL VAO IAO SDL SL SZERO SFULL SR Parameter Supply voltage Supply current CLK=1MHz Operation IAO=0A Test conditions Ratings MIN 2.4VDD 2.0 1.2 3.5 GND 0.1 0.2 -2.5 -1.0 VrefU=4.79V VrefL=0.95V VCC=13V(36mV/LSB) without load (IAO=0) -1.5 -2.0 -2.0 0.2 TYP MAX 13 4.0 2.5 VDD 1.5 VCC-0.1 VCC-0.2 2.5 1.0 1.5 2.0 2.0 Unit V mA mA V V V V mA LSB LSB LSB LSB V/s
VrefU=5V,VrefL=0V D-A converter upper Data condition: reference voltage input current at maximum current D-A converter upper The output dose not necessarily be the values reference voltage range within the reference D-A converter lower voltage setting range. reference voltage range Buffer amplifier IAO=500A output voltage range IAO=1.0mA Upper side saturation Buffer amplifier voltage=0.3V Lower side saturation output drive range voltage=0.2V
Differential nonlinearity error Nonlinearity error Zero code error Full scale error Output slew rate
MITSUBISHI ELECTRIC
1997-5-28D.rev
( 3 / 7)
MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
I2C BUS LINE CHARACTERISTICS
Symbol fSCL tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO
SCL clock frequency Time the bus must be free before a new transmission can start Hold time START Condition. After this period,the first clock pulse is generated. LOW period of the clock High period of the clock Set-up time for START condition (Only relevant for a repeated START condition) Hold time DATA Set-up time DATA Rise time of both SDA and SCL lines Fall time of both SDA and SCL lines Set-up time for STOP condition
Parameter
Normal mode Min. 0 4.7 Max. 100 -
High speed mode Min. 0 1.3 Max. 400 -
units KHz s s s s s s ns ns ns s
4.0 4.7 4.0 4.7 0 250 4.0
1000 300 -
0.6 1.3 0.6 4.7 0 100 20+ 20+ 0.6
0.9 300 300 -
*Note that a transmitter must internally provide at least a hold time to bridge the undefined region (max.300 ns) of the falling edge of SCL. TIMING CHART
tR, tF tBUF VIH
SDA
VIL
tHD:STA VIH
SCL
tSU:DAT
tHD:DAT
tSU:STA
tSU:STO
VIL tLOW
START
tHIGH
START STOP START
MITSUBISHI ELECTRIC
1997-5-28D.rev
( 4 / 7)
MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
I 2 C- BUS FORMAT STA SLAVE ADDRESS W A SUB ADDRESS DIGITAL DATA FORMAT
*SLAVE ADDRESS
First Last
A
DAC DATA
A STP
*SUB ADDRESS
First Last
1
0
0
1
A2
A1
A0
X
X
X
X
S3
S2
S1
S0
(SLAVE ADDRESS)
CHIP SELECT DATA
Don't care
Last LSB
CHANNEL SELECT DATA
*DAC DATA
First MSB
D7
D6
D5
D4
D3
D2
D1
D0
(1)CHIP SELECT DATA
MSB LSB
(2)CHANNEL SELECT DATA
MSB LSB
A2 0 0 0 1
A1 0 0 1 1
A0 CS2 CS1 CS0 0 1 0 1 0 0 0 1 0 0 1 1 0 1 0 1
S3 0 0 0 1 1 1 1
S2 0 0 0 0 1 1 1
S1 0 0 1 1 0 0 1
S0 0 1 0 1 0 1 1
Channel selection
Don't care. ch1 selection ch2 selection ch11 selection ch12 selection Don't care. Don't care.
Lower 3bits(A0,A1,A2) are a programmable address. This IC is accessed only when the lower 3 bits data of slave address coincide with the data of CS0 to CS2.(refer to the upper table)
(3)DAC DATA
First MSB Last LSB
D7 0 0 0 0 1 1
D6 0 0 0 0 1 1
D5 0 0 0 0 1 1
D4 0 0 0 0 1 1
D3 0 0 0 0 1 1
D2 0 0 0 0 1 1
D1 0 0 1 1 1 1
D0 0 1 0 1 0 1
DAC output
(VrefU-VrefL)/256 x 1 x 2.4 + VrefL (VrefU-VrefL)/256 x 2 x 2.4 + VrefL (VrefU-VrefL)/256 x 3 x 2.4 + VrefL (VrefU-VrefL)/256 x 4 x 2.4 + VrefL (VrefU-VrefL)/256 x 255 x 2.4 + VrefL (VrefU-VrefL) x 2.4 + VrefL
MITSUBISHI ELECTRIC
1997-5-28D.rev
( 5 / 7)
MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
TIMING CHART (MODEL)
*start condition to slave address bite
SDA SCL R DAC output
start condition *sub address bite
1
2
3
4
5
6
7
W
A
SDA SCL R DAC output
1
2
3
4
5
6
7
8
A
*DAC data bite to stop condition
SDA SCL R DAC output
1
2
3
4
5
6
7
8
A
stop condition
*Start condition ......... With SCL at HIGH,SDA line goes from HIGH to LOW *Stop condition ......... With SCL at HIGH,SDA line goes from LOW to HIGH (*Under normal circumstances,SDA is changed when SCL is LOW) *Acknowledge bit ...... The receiving IC has to pull down SDA line whenever receive slave data. (The transmitting IC releases the SDA line just then transmit 8bit data.)
MITSUBISHI ELECTRIC
1997-5-28D.rev
( 6 / 7)
MITSUBISHI
M62398P,FP
8BIT 12CH I 2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS
PRECAUTION FOR USE
M62398 have 5 terminals (VDD,VCC,VrefU1,VrefU2,VrefL) for input constant voltage at use. IF ripple or spike is input these terminals,accuracy of D-A conversion is down. So,when use this device,please connect capacitor among each terminal to GND for stable D-A conversion. This IC's output amplifier has an advantage to capacitive load.So it's no problem at device action when connect capacitor (0.1F MAX) among output to GND for every noise eliminate.

5V
10F VDD VCC AO1
10F
13V
CS2 CHIP SELECT DATA SETTING CS1 CS0 RESET SIGNAL R
AO2 AO3 AO4 AO5
VrefU1 5V 10F
AO6 AO7
VrefU2 5V 10F
AO8 AO9
5V SCL MCU SDA GND
AO10 AO11 AO12 VrefL
ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12
Analog output terminals
10F
*Purchase of MITSUBISHI ELECTRIC CORPORATION'S I2C components conveys a license under the Philips I2C Patent Rights to use these components an I2C system,provided that the system conforms to I2C Standard Specification as defined by Philips.
!
Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury,fire or property damage.Remember to give due consideration to safety when making your circuit design,in order to prevent fires from spreading,redundancy,malfunction or other mishap.
MITSUBISHI ELECTRIC
1997-5-28D.rev
( 7 / 7)

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